Optimized Decoder Design and Implement for High Rate LDPC Codes
高码率LDPC码译码器的优化设计与实现
Design of LDPC Decoder Based on DVB-S2 Standard
基于DVB-S2标准LDPC码译码器的设计
An FPGA Implementation of QC-LDPC Decoder
准循环LDPC码译码器的FPGA实现
Design of LDPC Coder-Decoder Based on Cyclic Shift Matrices
应用循环移位矩阵设计LDPC码译码器
The Research and FPGA Realization of LDPC in DMB-T System
DMB-T系统中多码率LDPC码译码器研究及实现
Research and FPGA Implementation of LDPC Codes Decoder for CMMB&T-MMB
CMMB/TMMB标准中LDPC码译码器的研究与FPGA实现
Design and implementation of a high-throughput decoder for multi-rate LDPC code
多码率LDPC码高速译码器的设计与实现
Principles of the Codec for LDPC Codes and Its Hardware Implementation;
LDPC码编译码器的原理及其硬件实现
Design of Codec for Quasi-cyclic LDPC Codes and Its FPGA Implementation
准循环LDPC码的编译码器设计及FPGA实现
Multi-rate LDPC decoder for the Chinese DTTB standard
面向中国DTTB标准的多码率LDPC译码器
Design and implementation of a full parallel LDPC decoder
LDPC码全并行译码器的设计与实现
Research on the Turbo, LDPC Encoding/Decoding and Implementation of LDPC Decoding;
Turbo、LDPC编译码研究及LDPC码译码实现
The LDPC Decoder's Research Based on DTMB Standard
基于DTMB标准的LDPC译码器的研究
Optimized Design and Implement of LDPC Decoder in DTMB
DTMB标准中LDPC译码器的优化设计与实现
Design and Implementation of a High-speed LDPC Encoder and Decoder
一种高速LDPC编译码器的设计与实现
A TDMP-LDPC Decoder Desiged for DMB-T Standard
符合DMB-T标准的TDMP-LDPC译码器设计
VLSI Implementation of QC-LDPC Decoder Using Optimized TDMP Algorithm
基于TDMP优化算法的QC-LDPC译码器VLSI实现
Design of Array LDPC Decoder
Array LDPC码解码器设计
CopyRight © 2020-2024 优校网[www.youxiaow.com]版权所有 All Rights Reserved. ICP备案号:浙ICP备2024058711号