The delay time formulae of the carry lookahead adders(CLA) were given based on the standard delayed model of logic gate and optimal circuit unit.
从门电路标准延迟模型出发 ,在超前进位加法器单元电路优化的基础上 ,给出了超前进位加法器延迟时间公式 ,阐明了公式中各项的意义 。
The delay time formulae of TC 2CLA were given based on the standard delayed model of logic gate and optimum circuit unit.
给出了顶层进位级联超前进位加法器延迟时间公式 。
The modular delay time formulae of TC2CLA of hybrid modules which based on optimizing circuit unit of CLA and the standard delayed time of logic gate tpd .
在CLA单元电路优化和门电路标准延迟时间tpd的基础上,由进位关键路径推导出混合模块TC2CLA的模块延迟时间公式,阐明了公式中各项的意义。
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