Bus Interface Logic是什么意思

网络释义

用法例句

The distributed control system(DCS) for Unit 10 in Shaoguan Power Plant experienced problems such as false action of protection, failure of multiple function processor(MFP), defective interface logic for DCS and digital electro~hydraulic(DEH) control system, and loss of power in modulating control system(MCS) cabinet.

韶关发电厂10号机组分散控制系统(DCS)在运行过程中出现保护信号误发、多功能处理卡MFP故障、DCS与数字电液调节系统(DEH)接口逻辑不完善、摸拟量控制(MCS)柜失电等问题,分析了问题产生的原因并提出相应的解决方法,目前系统运行稳定,控制逻辑满足安全生产的要求。

compile interface logic of Slavefifo mode of USB.

使用Xinlinx公司的FPGA编写USB的SlaveFifo模式的接口逻辑,并进行测试。

By increasing off-chip memory,producing the TFT timing and bus arbitration logic from FPGA,the CPU and LCD module can share the display memory without conflict,it can effectivly reduce the CPU s loading.

通过增加片外显示存储器,由FPGA产生TFT-LCD所需的控制时序并完成总线仲裁逻辑,实现CPU和LCD模块对显示存储器的共享访问,有效的降低了CPU的负荷。

Design of 1553B Bus Interface Logic Based on SOPC

基于SOPC的1553B总线接口逻辑设计

BBL Back-side Bus Logic. Logic for interface to the back-side bus for accesses to the internal unified level two processor cache.

后端总线逻辑。访问内部统一二级处理器缓存的后端总线接口逻辑。

Logic Design of Bus Interface for Single Chip Computer based on EDA

基于EDA技术的单片机与总线接口逻辑设计

PCI Bus Interface Bridging Logic Design Based on FPGA;

基于FPGA的PCI总线接口桥接逻辑设计

Research of Hardware Logical Connection between TMS320C6202 and VMEbus;

TMS320C6202与VME总线的硬件逻辑连接研究

interface level converter

逻辑接口电平变换器

The Design and Realization of Serial Bus Virtual Logic Tester;

串行总线虚拟逻辑分析仪设计与实现

Research on the control logic of continuous high speed acquisition based on PCI bus

PCI总线高速连续采集控制逻辑研究

ATM interface failures are physical or logical.

ATM接口失效可以是物理的或者逻辑的。

100-M Byte Disk Driver Interface aed Control Logic

100兆字节磁盘驱动器接口和控制逻辑

Design and FPGA Verification for the MDIO Interface Logic Integrated Circuit;

MDIO接口逻辑设计及其FPGA验证

Logic Design for Bus Interface of MCS-51 Single Chip Microcomputer and FPGA

MCS-51单片机与FPGA接口的逻辑设计

Design of MDIO Interface Logic Circuit based on FPGA

基于FPGA的MDIO接口逻辑设计

Data entered into the form describes each logical antenna face and the cell sites neighbor lists.

输入到该表格的数据用来描述每个逻辑天线接口和小区基站的邻居列表。

The Design of Distributed Control System of Cluster Motors Based on EtherCAT Field Bus and Soft Logic Technology

基于EtherCAT总线的集散式电机软逻辑控制系统设计

Design and Application of General Interface of SCM and CPLD

单片机和可编程逻辑器件通用接口设计及应用

Design and Implementation of MVB Interface Vehicle Logic Control Module Based on ARM;

基于ARM的MVB接口机车逻辑控制模块设计与实现

Research on Logical Volume Management and Fibre Channel Interface in FC RAID;

光纤盘阵列中逻辑卷管理与光纤通道接口研究